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2-A supercap charger balances and protects cells in portable applications

Supercapacitors (also known as ultra-capacitors or supercaps) continue to carve out a niche in the market space between conventional capacitors and batteries. They are replacing batteries in data storage applications requiring high current/short duration backup power, and they are also finding use in a variety of high peak power applications in need of high current bursts or supplementary battery backup. 

Compared to batteries, supercaps provide better power density with higher peak power delivery capability, smaller form factors, higher charge cycle life over a wider operating temperature range, and have lower ESR. Compared to standard ceramic, tantalum or electrolytic capacitors, supercaps offer higher energy density in a similar form factor & weight. A supercap’s lifetime is maximized by reducing the capacitor’s top-off voltage and avoiding high temperatures (>50°C). See Table 1 below for a comparison of key features.


Table 1. Supercapacitors vs. Capacitors vs. Batteries

Summary - Supercaps vs. Batteries:

Batteries:
•     Good energy density
•     Moderate power density
•     High equivalent series resistance (ESR) at cold temperatures

Supercaps:
•      Moderate energy density
•      Good power density
•      Low ESR – even at cold temperatures
        ( ~2x increase at -20°C vs. 25°C)

Supercap Limitations:
•      Limited to 2.5 V or 2.75 V maximum per cell
•      Must compensate for leakage differences in stacked applications
•      Lifetime degrades quicker at high charge voltages and high    temperatures

Early generation 2-cell supercap chargers were designed for low current charging from 3.3 V, 3xAA, or a Li-Ion/Polymer battery since these ICs have a boost topology. However, supercap technology improvements have expanded the market, resulting in a slew of medium to higher current opportunities not necessarily confined to the consumer product space. Primary applications include solid state disk drives and mass storage backup systems, high current portable electronic devices such as industrial PDAs and handy terminals, data loggers, instruments, medical equipment, and miscellaneous “dying gasp” industrial applications such as security devices and alarm systems. Other consumer applications include those with high power bursts including LED flash in cameras, PCMCIA card and GPRS/GSM transceivers, and hard disk drives (HDDs) in portable devices.

Design Challenges for Supercap Chargers
Supercaps have many advantages; however, when used in a stack of two or more caps in series they present the designer with problems such as cell balancing, cell overvoltage damage while charging, excessive current draw, and a large footprint/solution. Higher charging current may be required if frequent bursts of high peak power is needed.  In addition, many of the charging sources may be current limited, for example, in a battery buffer application or in a USB / PCCARD environment.  Handling these conditions is crucial for space-constrained, higher power portable electronic devices.

Cell balancing series-connected supercapacitors ensures that the voltage across each cell is approximately equal; whereas a lack of cell balancing in a supercap may lead to overvoltage damage. For low-current applications, a charge pump with external circuitry with one balancing resistor per cell is an inexpensive solution to the problem; the balancing resistor value will depend primarily on the capacitor leakage currents as explained below.  In order to limit the impact of the current drain due to balancing resistors on supercap energy storage, designers can alternatively use a very low current active balance circuit. Another source of cell mismatch is differences in leakage current. Leakage current in the capacitor cells starts off quite high and then decays to lower values over time. But if the leakage is mismatched between series cells, the cells may become over-voltaged upon recharge unless the designer selects balance resistors that provide significantly more load current on each cap than the cap leakage itself. Balancing resistors burden the application circuit with unwanted components and permanent discharge current.  They also provide no overvoltage protection for each cell if mismatched capacitors are charged at high currents.

For medium to higher power applications, another inexpensive approach to solving the supercap charging problem involves using a current limited switch plus discretes and external passive components. In this approach, the current limited switch provides the charge current and limiting, while voltage reference and comparator ICs provide the voltage clamping, and finally an op amp (sink/source) with balance resistors enables supercap cell balancing. Nevertheless, the lower the ballast resistor value, the higher the quiescent current and the shorter the battery run time; the obvious benefit being saved cost. However, this solution is very cumbersome to implement and performance is marginal at best.

Any solution to satisfy the supercap charger IC design constraints outlined above would have to combine a high current charger for 2 series supercaps with automatic cell balancing and voltage clamping. Therefore, Linear Technology has developed a simple, yet sophisticated, monolithic supercap charger IC for moderate to high power applications that requires no inductor, eliminates the need for balance resistors, has various operating modes and also features low quiescent current.

A Simple Solution
The LTC4425 is the next in Linear Technology’s family of 2-cell supercapacitor chargers for addressing high peak power, data backup and “dying gasp” needs in portable and data storage applications.  The device employs a linear constant-current, constant-voltage architecture with thermal limiting to charge two supercapacitors in series to a programmable output voltage from a Li-Ion/Polymer battery, a USB port, or a 2.7 V to 5.5 V current-limited supply. The LTC4425 features two operating modes: charge current profile (normal) mode and LDO mode. The charge current profile mode charges the top of the supercap stack to the input voltage V_IN with a charge current that varies inversely with the input-to-output voltage differential, while the LDO mode charges the top of the stack to an externally programmed output voltage with a fixed charge current that is also externally programmable. Charge current is resistor programmable up to 2 A (3 A peak), and each capacitor is protected against over-voltage by internal shunts (2.45 V/2.7 V selectable). The IC’s onboard current-limited ideal diode features  low 50 mOhm on resistance to prevent back-driving of V_IN and suits the part for a wide variety of high peak power battery and USB-powered equipment, industrial PDAs, portable instruments and monitoring equipment, power meters, supercap backup circuits, and PC card/USB modems.

The LTC4425’s automatic cell balancing feature maintains equal voltages across both cells, eliminating the need for balancing resistors, while protecting each supercapacitor from overvoltage damage while minimizing current drain on the capacitors. The IC operates with a very low 20 uA quiescent current when the output voltage is in regulation and draws only 2 uA in shutdown from either V_IN or V_OUT, whichever is higher. The basic charging circuit requires only 6 external components and is compact. Other key features include a V_IN power fail indicator, and continuous monitoring of V_IN to V_OUT current via the PROG pin. Additional protection features include current and thermal limiting that reduces charge current in cases of excessive temperature, and V_IN to V_OUT current limiting.

The LTC4425 is housed in two compact, thermally-enhanced packages: a 12-lead, low-profile (0.75 mm) 3 mm x 3 mm DFN package, and a 12-lead MSOP package. The device operates over a -40°C to 125°C junction temperature range.


Figure 1. LTC4425 Block Diagram/Application Circuit

LDO Mode
In LDO mode, the output voltage (V_OUT) is programmed by an external resistor divider network consisting of RFB1 and RFB2 via the FB pin and the charge current is programmed by an external resistor RPROG via the PROG pin. Refer to the block diagram shown in Figure 2. The charger control circuitry consists of a constant-current amplifier and a constant-voltage amplifier. When the IC is enabled to charge a discharged supercap stack, initially the constant-current amplifier is in control and servos the PROG pin voltage to 1 V. The current through the PROG resistor gets multiplied by approximately 1000, the ratio of the sense MOSFET (MPSNS) and the power MOSFET (MPSW), to charge the supercap stack. As the output voltage V_OUT gets close to the programmed value, the constant-voltage amplifier takes over and backs off the charge current as necessary to maintain the FB pin voltage equal to an internal reference voltage of 1.2 V. Since the PROG pin current is always about 1/1000 of the charge current, the PROG pin voltage continues to give an indication of the actual charge current even when the constant-voltage amplifier is in control.


 

Figure 2. LTC4425 Block Diagram (4425 BD)

Charge Current Profile (Normal) Mode
The LTC4425 is placed into charge current profile mode when the FB pin is shorted to the input voltage V_IN. In this mode of operation, the constant-voltage amplifier is internally disabled but the charge current is still programmed by the external RPROG resistor. The charger provides 1/10 of the programmed charge current if the input-to-output voltage differential (V_IN–V_OUT) is more than 750 mV to limit the power dissipation within the chip. As this differential voltage decreases from 750 mV, the charge current increases linearly to its full programmed value when V_OUT is within 250 mV or closer to V_IN. As V_OUT rises further, the voltage across the charger FET gets too small to support the full charge current. So the charge current gradually falls off and the charger FET enters into its triode (ohmic) region of operation (see Figure 3). Since the charger FET RDS_(ON) is approximately 50 mΩ, with a programmed charge current of 2 A, the FET will enter the ohmic (triode) region and the charge current will start to fall off when V_OUT is within about 100 mV of V_IN.


Figure 3. LTC4425 Charge Current vs. Voltage Differential

Voltage Clamp Circuitry
The LTC4425 is equipped with circuitry to limit the voltage across either supercap in the stack to a maximum allowable voltage V_CLAMP. There are two preset voltages, 2.45 V or 2.7 V, for V_CLAMP selectable by the SEL pin. The SEL pin should be set to logic low for lower V_CLAMP voltage of 2.45 V and to logic high for the higher V_CLAMP voltage of 2.7 V. If the voltage across the bottom capacitor, i.e., the V_MID pin voltage reaches V_CLAMP first, an NMOS shunt transistor turns on and starts to bleed charge off of the bottom capacitor to GND. Similarly, if the voltage across the top capacitor, V_TOP, reaches the V_CLAMP voltage first, a PMOS shunt transistor turns on and starts to bleed charge off of the top capacitor to the bottom one.

When the voltage across any of the supercaps reaches within 50 mV of V_CLAMP, a transconductance amplifier starts to cut back the charge current linearly. By the time any of the shunt devices are on, the charge current is reduced to 1/10 of the programmed value and stays at this reduced level as long as the shunt device is on. This is to prevent the shunt devices from being damaged by excessive heat.

The comparators that control the shunt devices have a 50 mV hysteresis meaning that when the voltage across either capacitor is reduced by 50 mV, the shunt devices turn off and normal charging resumes with full charge current unless limited by any of the other amplifiers controlling the gate of the charger FET. In the event both capacitors exceed their maximum allowable voltage, V_CLAMP, the main charger FET completely shuts off and both shunt devices turn on. Both shunt devices are actually current mirrors guaranteed to shunt more current away than that coming through the charger FET.

Leakage Balancing Circuitry
The LTC4425 is also equipped with an internal leakage balancing amplifier (LBA) which servos the midpoint, i.e., V_MID pin voltage, to exactly half of the output voltage, V_OUT. Due to its limited 1mA source and sink capability, it is designed to handle slight mismatch of the supercaps due to leakage currents; not to correct any gross mismatch due to defects. The balancer is only active as long as there is an input voltage present. The internal balancer eliminates the need for external balancing resistors.



Conclusion
Supercapacitors are now being used in applications where batteries once ruled. Initial applications were low current, but technology has advanced and supercaps are now found in a variety of medium and high power applications in both consumer and non-consumer segments. Supercaps have many inherent advantages over batteries such as higher peak power delivery, longer cycle life and smaller form factor.  However, product designers using supercaps are faced with problems such as of the need for cell balancing and potential over-voltage damage to supercap cells.

Linear Technology has addressed these needs, and others, by adding to its innovative supercap charger IC family. The LTC4425 is a 2 A linear charger featuring automatic cell balancing, voltage clamping, various operation modes and low current consumption. To construct a comparable solution requires at least 4 ICs (a current limited switch for current limiting, an op amp and high-value balance resistors for low I_q automatic cell balancing plus a voltage reference and comparator ICs for regulating and limiting the supercap voltage) plus passive discretes.

The LTC4425 offers a number of useful features in a small footprint, reducing overall solution size and in turn enabling more compact, simpler designs.

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