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Power components

Guidelines For Supplying Power to High Speed ADCs

December 13, 2010 | Michael Cobb | 222901922
Guidelines For Supplying Power to High Speed ADCs Michael Cobb, Applications Engineer, High-speed Signal Processing Group, Analog Devices, provides background on ADC power domains and sensitivities and addresses basic guidelines for supplying power to high speed ADCs.
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In order to get maximum performance from a high speed analog to digital converter it must be supplied with clean DC power supplies. A noisy power supply can lead to lowered SNR and/or undesired spurious content in the ADCs output.

Analog and Digital Supplies


Most of todays high speed analog to digital converters have at least two supply domains, an analog supply (AVDD) and a digital and output driver supply (DRVDD). Some converters have an additional analog supply which typically should be treated like an extra AVDD supply discussed here. The analog and digital supplies on a converter are separated in order to prevent the digital switching noise (particularly the noise generated from the output drivers) from interfering with the sampling and processing of the analog sample on the analog side of the part. Depending on the signal being sampled this digital output switching noise can have significant frequency content and can easily degrade both noise and spurious performance if this noise is allowed back into the analog or clock inputs of the part or into the analog side of the chip through the power supplies.
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