Intelligent Interleaving: improving energy efficiency in AC-DC power supplies
At APEC 2009, held in Washington DC recently, Fairchild Semiconductor unveiled the FAN9612 Interleaved Dual Boundary Conduction Mode (BCM) Power Factor Correction (PFC) controller. The FAN9612 introduces several innovative, distinguishing functions aimed at maximizing performance, reducing external components and offering a robust set of protection features while increasing efficiency.
Interleaving is a special case of paralleling where a unique phase relationship exists between two or more power stages commonly referred to as phases or channels. In order to retain all the ripple current cancellation benefits from a two-stage design, it is imperative that each channel be synchronized 180 degrees out of phase with respect to the other. Since each channel is ideally designed to process 50% of the power, disrupting or losing synchronization, especially any time the load exceeds 50% of the maximum rated current can be catastrophic to the overall design. In other words, a synchronization algorithm lacking tight tolerance unnecessarily drives the need to over design the power stage. The FAN9612 uses a proprietary synchronization scheme known as Sync-Lock to assure near perfect, 180 degree synchronization during soft-start, soft-stop and under all transient and steady state operating conditions. If a failure mode results in one channel becoming inoperable, an internal restart timer is activated which effectively acts as a power limit, preventing the operating phase from trying to deliver full rated power. All the necessary synchronization and safety functions are completely handled by the FAN9612, eliminating the need to over-design the power stage resulting in a design highly optimized for efficiency, performance and reliability.
Start-up is a primary concern for any power supply design and PFC converters are no exception. The regulated output voltage set point for most PFC applications is in the range of 400V so any amount of voltage over-shoot, particularly during soft-start induces additional stress to the output bulk capacitor and switching components. The FAN9612 addresses two very important start-up related design issues. The first is the ability to maintain closed-loop soft-start during the entire start-up sequence. The figure below shows the functional implementation of the FAN9612 proprietary soft-start circuitry and simulated start-up sequence.
Closed-Loop Soft-Start Performance
Click on image to enlarge.
By clamping the reference voltage to the error amplifier feedback voltage the soft start capacitor, CSS, is slightly pre-charged to facilitate faster initial start-up. More importantly, the error amplifier output directly controls the soft-start charging current, ISS(VCTRL) , so if the error amplifier approaches saturation, the current source is throttled back to decrease VSS(t) assuring the error amplifier output voltage remains well controlled. Regardless of where in the soft-start cycle the downstream dc-dc converter begins to draw power from the PFC output, the FAN9612 internally regulates the non-inverting error amplifier input to avoid saturation and assure there is no voltage overshoot during start-up or restart due to transient fault conditions.
Complementary to the closed-loop soft-start operation, the FAN9612 enables the optional capability to start-up directly through the VOUT resistor divider network. For applications that do not include an adequate auxiliary bias supply voltage or standby power supply, starting up any high voltage IC entails a method of charging the VDD capacitor until the voltage reaches the control IC under voltage lockout (UVLO) turn-on threshold. This normally requires additional circuitry which dissipates power and lowers efficiency. Some designers will include a method to switch the start-up circuit off once the bootstrap bias supply takes over to power the PFC control IC. This approach does help reduce power dissipation but it often requires a high-side switch and drive circuitry increasing external component count. The FAN9612 is designed to start-up without an external start-up resistor. Adding a small-signal diode, DSTART, between FB and VDD provides a current path through RFB1 which is highlighted by the red dashed line in the figure below. As soon as the internal 5V reference is in regulation, the small-signal MOSFET, QSTART, is enabled and the resistor feedback network is relieved from the start-up function. Optionally, DSTART and QSTART can be omitted and conventional start-up methods can be applied.
Alternate Simplified Start-Up Circuitry
Click on image to enlarge.
For PFC circuits that sense the AC input voltage, most controllers require an external two-pole filter to derive the RMS line voltage. While this is acceptable for line UVLO (also known as brown-out protection), the sluggishness of the two-pole filter results in additional line current distortion which hinders using the RMS voltage information for any part of the PWM control such as voltage feed-forward. Instead, the FAN9612 senses the peak of the AC input voltage to derive the RMS value. Since the RMS value is proportional to the peak of the line voltage, the required external circuitry is reduced from a two-pole filter to a simple resistive divider. As shown in the figure below, the FAN9612 uses the divided down, peak voltage signal for brown-out protection (VIN(UVLO)), input over voltage protection (VIN(OVP) ) and voltage feed-forward (VIN(VFF) ) as part of the PWM control. The ratio between RIN1 and RIN2 is used to set the VIN(OVP) trip point and brown-out protection level. Brown-out hysteresis is a programmable feature unique to FAN9612 and is selectable by the internal 2μA current source and RIN(HYS) .
Input Voltage Sensing Circuitry
Click on image to enlarge.
Voltage feed-forward offers several advantages to PFC converters. First, the control loop gain becomes independent of input voltage which greatly eases the task of compensation and helps maintain tighter output voltage regulation during line transients. Secondly, the input current remains sinusoidal, reducing current distortion, even during power limit. Third, since the user-programmable maximum on-time (MOT) is proportional to VIN, an effective power limit function for each channel is realized. And finally, the FAN9612 is also capable of operating with DC input voltage, making it suitable for high power inverters such as those designed for solar power applications.
In addition to brown-out protection and input voltage OVP, the FAN9612 offers two levels of output voltage OVP. The feedback resistors, RFB1 and RFB2, shown in the figure below, divide down the output voltage and feed this signal to the input of the FAN9612 transconductance error amplifier. A non-latching output OVP circuit internally monitors this signal and is programmed to prevent switching if the feedback voltage exceeds 3.25V. So in effect, RFB1 and RFB2 perform the dual function of regulating the output voltage and fulfilling output OVP. Some applications may have design requirements restricting the output OVP and voltage regulation functions from sharing the same resistor string. The FAN9612 addresses this concern by supplying a second level, latching OVP function. The threshold of this latching circuit is 3.5V and can be actively set by ROV1 and ROV2 above the non-latching OVP level. In the unlikely event that RFB2 were to short to ground, this second level OVP function latches DRV1 and DRV2 off.
Simplified Application Circuit
Click on image to enlarge.
For over-current protection (OCP), the FAN9612 independently senses the peak current in each channel as indicated by RCS1 and RCS2 in Figure 4. Sensing the phases individually offers a more reliable and more efficient OCP solution compared to using a single current sense resistor in the return path. To save components, a small RC filter, commonly used to dampen the leading edge spike seen at the current sense input, is integrated internally for each input. And finally, the FAN9612 current sense threshold is set to 200mV, minimizing power dissipated in the current sense resistor.
Added energy saving technologies takes into account both nominal and light load efficiency requirements. Part of the FAN9612 synchronization circuit utilizes a maximum frequency clamp to limit frequency-dependent Coss MOSFET switching losses at light load and near zero crossing of the AC input voltage. During the portion of the line voltage for VIN greater than VOUT/2, Coss capacitive switching losses are further reduced through a valley-switching technique used to sense the optimal MOSFET turn-on time. Conversely, when VIN is less than VOUT/2, the main power MOSFET turns-on using zero voltage switching (ZVS). ZVS in conjunction with zero current switching (ZCS), from BCM operation, eliminates MOSFET turn-on switching loss and reverse recovery loss in the output rectifier.
Light load efficiency improvements are met by the FAN9612's automatic phase management. The FAN9612 evaluation board (EVB) was designed to demonstrated phase management capability between approximately 30% (phase disable) and 40% (phase enable) load current but exact thresholds can be adjusted using the FAN9612 MOT input. The efficiency plots shown in the figures below emphasize light load efficiency improvements when one of the phases is disabled as the load current falls to just below 30% of its maximum nominal value. Two-channel interleaved operation resumes automatically when the load current reaches near 40% of the maximum nominal value. The FAN9612 EVB is a 400W dual interleaved BCM PFC converter, with measured light load efficiency improvements as much as 1% for VIN = 115VAC and 6.5% for VIN = 230VAC.
FAN9612 EVB Phase Management Efficiency Performance (Note: EMI Filter Included)
Click on image to enlarge.
In summary, the FAN9612 enables the highest efficiency levels possible for PFC solutions less than 1KW, making it the best interleaved BCM PFC controller on the market with the richest combination of features and performance.
Applications that would benefit most from this topology include consumer electronics, digital displays (LCD, PDP, medical), lighting, desktop computing, entry level servers, telecom rectifiers, industrial power systems and solar inverters.
For additional information on the details of features mentioned, please visit the FAN9612 product folder at:
- No news
- KTH The Royal Institute of Technology develops world's first water-activated charging device for mobile phones
- Volvo evaluates flywheel hybrid drive - fuel savings of up to 25%
- PV storage market is set to grow to USD19bn by 2017
- Energy harvesting wireless switch transmits on-off data over a 300m range at 868MHz
- Accutronics offers new custom battery service
- Nordic Semiconductor releases world's smallest Bluetooth low energy and ANT+ ICs
- Power-One enters into patent license agreement with Microchip
- Quad-MOSFET solution boosts efficiency and eliminates heat sinking in active bridge applications
- Advanced microcontroller combines floating point and low leakage technology to achieve longest battery lifetime in portable applications
- Market for GaN and SiC power semiconductors set to rise by factor of 18 in next decade
- High Voltage Surge Stoppers Ensure Reliable Operation During Power Surges
- Motor-Drive Design made Simple
- Adaptive Cell Converter Topology Enables Constant Efficiency in PFC Applications
- Micropower Isolated Flyback Converter with Input Voltage Range from 6V to 100V
- Derating of Schottky Diodes
- Heatsink Optimization
- High Performance ZVS Buck Regulator Removes Barriers To Increased Power Throughput
- Waste heat replaces batteries
- Stepper Motor Control IC
- 50Ω Gain Block IF Amplifier